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Dahiya AS, Opoku C, Sporea RA, et al. Single-crystalline ZnO sheet Source-Gated Transistors. Sci Rep. 2016;6:19232doi: 10.1038/srep19232.
Dahiya, A. S., Opoku, C., Sporea, R. A., Sarvankumar, B., Poulin-Vittrant, G., Cayrel, F., Camara, N., & Alquier, D. (2016). Single-crystalline ZnO sheet Source-Gated Transistors. Scientific reports, 619232. https://doi.org/10.1038/srep19232
Dahiya, A S, et al. "Single-crystalline ZnO sheet Source-Gated Transistors." Scientific reports vol. 6 (2016): 19232. doi: https://doi.org/10.1038/srep19232
Dahiya AS, Opoku C, Sporea RA, Sarvankumar B, Poulin-Vittrant G, Cayrel F, Camara N, Alquier D. Single-crystalline ZnO sheet Source-Gated Transistors. Sci Rep. 2016 Jan 13;6:19232. doi: 10.1038/srep19232. PMID: 26757945; PMCID: PMC4725757.
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Sci Rep. 2016 Jan 13;6:19232. doi: 10.1038/srep19232.

Single-crystalline ZnO sheet Source-Gated Transistors.

Scientific reports

A S Dahiya, C Opoku, R A Sporea, B Sarvankumar, G Poulin-Vittrant, F Cayrel, N Camara, D Alquier

Affiliations

  1. Université François Rabelais de Tours, CNRS, GREMAN UMR 7347, 16, rue pierre et marie Curie, 37071 Tours, France.
  2. Advanced Technology Institute, University of Surrey, Guildford, Surrey, GU2 7XH, United Kingdom.
  3. Université François Rabelais de Tours, INSA-CVL, CNRS, GREMAN UMR 7347, 3 rue de la Chocolaterie, CS 23410, 41034 BLOIS Cedex, France.

PMID: 26757945 PMCID: PMC4725757 DOI: 10.1038/srep19232

Abstract

Due to their fabrication simplicity, fully compatible with low-cost large-area device assembly strategies, source-gated transistors (SGTs) have received significant research attention in the area of high-performance electronics over large area low-cost substrates. While usually based on either amorphous or polycrystalline silicon (α-Si and poly-Si, respectively) thin-film technologies, the present work demonstrate the assembly of SGTs based on single-crystalline ZnO sheet (ZS) with asymmetric ohmic drain and Schottky source contacts. Electrical transport studies of the fabricated devices show excellent field-effect transport behaviour with abrupt drain current saturation (IDS(SAT)) at low drain voltages well below 2 V, even at very large gate voltages. The performance of a ZS based SGT is compared with a similar device with ohmic source contacts. The ZS SGT is found to exhibit much higher intrinsic gain, comparable on/off ratio and low off currents in the sub-picoamp range. This approach of device assembly may form the technological basis for highly efficient low-power analog and digital electronics using ZnO and/or other semiconducting nanomaterial.

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