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Wu TT, Huang WH, Yang CC, et al. High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits. Sci Rep. 2017;7(1):1368doi: 10.1038/s41598-017-01012-y.
Wu, T. T., Huang, W. H., Yang, C. C., Chen, H. C., Hsieh, T. Y., Lin, W. S., Kao, M. H., Chen, C. H., Yao, J. Y., Jian, Y. L., Hsu, C. C., Lin, K. L., Shen, C. H., Chueh, Y. L., & Shieh, J. M. (2017). High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits. Scientific reports, 7(1), 1368. https://doi.org/10.1038/s41598-017-01012-y
Wu, Tsung-Ta, et al. "High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits." Scientific reports vol. 7,1 (2017): 1368. doi: https://doi.org/10.1038/s41598-017-01012-y
Wu TT, Huang WH, Yang CC, Chen HC, Hsieh TY, Lin WS, Kao MH, Chen CH, Yao JY, Jian YL, Hsu CC, Lin KL, Shen CH, Chueh YL, Shieh JM. High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits. Sci Rep. 2017 May 02;7(1):1368. doi: 10.1038/s41598-017-01012-y. PMID: 28465531; PMCID: PMC5431052.
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Sci Rep. 2017 May 02;7(1):1368. doi: 10.1038/s41598-017-01012-y.

High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits.

Scientific reports

Tsung-Ta Wu, Wen-Hsien Huang, Chih-Chao Yang, Hung-Chun Chen, Tung-Ying Hsieh, Wei-Sheng Lin, Ming-Hsuan Kao, Chiu-Hao Chen, Jie-Yi Yao, Yi-Ling Jian, Chiung-Chih Hsu, Kun-Lin Lin, Chang-Hong Shen, Yu-Lun Chueh, Jia-Min Shieh

Affiliations

  1. National Nano Device Laboratories, No. 26, Prosperity Road 1, Hsinchu, 30078, Taiwan.
  2. Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu, 30013, Taiwan.
  3. Departments of Photonics and Institute of Electro-Optical Engineering, National Chiao-Tung University, Hsinchu, 30010, Taiwan.
  4. National Nano Device Laboratories, No. 26, Prosperity Road 1, Hsinchu, 30078, Taiwan. [email protected].
  5. Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu, 30013, Taiwan. [email protected].
  6. National Nano Device Laboratories, No. 26, Prosperity Road 1, Hsinchu, 30078, Taiwan. [email protected].

PMID: 28465531 PMCID: PMC5431052 DOI: 10.1038/s41598-017-01012-y

Abstract

Development of manufacture trend for TFTs technologies has focused on improving electrical properties of films with the cost reduction to achieve commercialization. To achieve this goal, high-performance sub-50 nm TFTs-based MOSFETs with ON-current (I

References

  1. Nature. 2004 Nov 25;432(7016):488-92 - PubMed
  2. Adv Mater. 2012 Jun 12;24(22):2945-86 - PubMed
  3. Sci Rep. 2014 Oct 31;4:6858 - PubMed

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