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Halawani Y, Kilani D, Hassan E, et al. RRAM-based CAM combined with time-domain circuits for hyperdimensional computing. Sci Rep. 2021;11(1):19848doi: 10.1038/s41598-021-99000-w.
Halawani, Y., Kilani, D., Hassan, E., Tesfai, H., Saleh, H., & Mohammad, B. (2021). RRAM-based CAM combined with time-domain circuits for hyperdimensional computing. Scientific reports, 11(1), 19848. https://doi.org/10.1038/s41598-021-99000-w
Halawani, Yasmin, et al. "RRAM-based CAM combined with time-domain circuits for hyperdimensional computing." Scientific reports vol. 11,1 (2021): 19848. doi: https://doi.org/10.1038/s41598-021-99000-w
Halawani Y, Kilani D, Hassan E, Tesfai H, Saleh H, Mohammad B. RRAM-based CAM combined with time-domain circuits for hyperdimensional computing. Sci Rep. 2021 Oct 06;11(1):19848. doi: 10.1038/s41598-021-99000-w. PMID: 34615915; PMCID: PMC8494892.
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Sci Rep. 2021 Oct 06;11(1):19848. doi: 10.1038/s41598-021-99000-w.

RRAM-based CAM combined with time-domain circuits for hyperdimensional computing.

Scientific reports

Yasmin Halawani, Dima Kilani, Eman Hassan, Huruy Tesfai, Hani Saleh, Baker Mohammad

Affiliations

  1. System-on-Chip Center (SoCC), Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, UAE.
  2. System-on-Chip Center (SoCC), Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, UAE. [email protected].

PMID: 34615915 PMCID: PMC8494892 DOI: 10.1038/s41598-021-99000-w

Abstract

Content addressable memory (CAM) for search and match operations demands high speed and low power for near real-time decision-making across many critical domains. Resistive RAM (RRAM)-based in-memory computing has high potential in realizing an efficient static CAM for artificial intelligence tasks, especially on resource-constrained platforms. This paper presents an XNOR-based RRAM-CAM with a time-domain analog adder for efficient winning class computation. The CAM compares two operands, one voltage and the second one resistance, and outputs a voltage proportional to the similarity between the input query and the pre-stored patterns. Processing the summation of the output similarity voltages in the time-domain helps avoid voltage saturation, variation, and noise dominating the analog voltage-based computing. After that, to determine the winning class among the multiple classes, a digital realization is utilized to consider the class with the longest pulse width as the winning class. As a demonstrator, hyperdimensional computing for efficient MNIST classification is considered. The proposed design uses 65 nm CMOS foundry technology and realistic data for RRAM with total area of 0.0077 mm

© 2021. The Author(s).

References

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  2. Nanotechnology. 2018 Dec 14;29(50):505702 - PubMed
  3. Nat Commun. 2020 Apr 2;11(1):1638 - PubMed

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