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Pfeil T, Potjans TC, Schrader S, et al. Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware. Front Neurosci. 2012;6:90doi: 10.3389/fnins.2012.00090.
Pfeil, T., Potjans, T. C., Schrader, S., Potjans, W., Schemmel, J., Diesmann, M., & Meier, K. (2012). Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware. Frontiers in neuroscience, 690. https://doi.org/10.3389/fnins.2012.00090
Pfeil, Thomas, et al. "Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware." Frontiers in neuroscience vol. 6 (2012): 90. doi: https://doi.org/10.3389/fnins.2012.00090
Pfeil T, Potjans TC, Schrader S, Potjans W, Schemmel J, Diesmann M, Meier K. Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware. Front Neurosci. 2012 Jul 17;6:90. doi: 10.3389/fnins.2012.00090. eCollection 2012. PMID: 22822388; PMCID: PMC3398398.
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Front Neurosci. 2012 Jul 17;6:90. doi: 10.3389/fnins.2012.00090. eCollection 2012.

Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware.

Frontiers in neuroscience

Thomas Pfeil, Tobias C Potjans, Sven Schrader, Wiebke Potjans, Johannes Schemmel, Markus Diesmann, Karlheinz Meier

Affiliations

  1. Kirchhoff Institute for Physics, Ruprecht-Karls-University Heidelberg Heidelberg, Germany.

PMID: 22822388 PMCID: PMC3398398 DOI: 10.3389/fnins.2012.00090

Abstract

Large-scale neuromorphic hardware systems typically bear the trade-off between detail level and required chip resources. Especially when implementing spike-timing dependent plasticity, reduction in resources leads to limitations as compared to floating point precision. By design, a natural modification that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on different levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system offers a 4-bit resolution of synaptic weights, which is shown to be sufficient within the scope of our network benchmark. Our findings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In addition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and configuring hardware-constrained synapses. We suggest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware verification practice may rise synergy effects between hardware developers and neuroscientists.

Keywords: NEST; PyNN; circuit variations; large-scale spiking neural networks; neuromorphic hardware; spike-timing dependent plasticity; synaptic weight resolution; wafer-scale integration

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