H Iwashita, S Kowatari, T Nakata, F Hirose - ICCAD, 1994 - researchgate.net

Automatic test program generation for pipelined processors.

pipeline programs

Iwashita

GSID: A5SN5rcIxa4J

Excerpt

Simulation-based verification has both advantages and disadvantages compared with formal verification. Our de-mand is to find a practical way to verify actual micro-processors …

Cited by

Architecture validation for processors.

Ho RC, Horowitz MA.
RC Ho, CH Yang, MA Horowitz… - … Symposium on Computer …, 1995 - ieeexplore.ieee.org
GSID: aX-vgOQWqTkJ

Electronic design automation: synthesis, verification, and test.

Cheng KTT.
LT Wang, YW Chang, KTT Cheng - 2009 - books.google.com
GSID: loSY0K8I2MsJ