Compiler autotuning using machine learning techniques. Ashouri AH. AH Ashouri - 2016 - politesi.polimi.it GSID: S9_PYe-_USIJ
A framework for compiler level statistical analysis over customized vliw architecture. Ashouri AH, Xydis S, Zaccaria V. AH Ashouri, V Zaccaria, S Xydis… - 2013 IFIP/IEEE 21st …, 2013 - ieeexplore.ieee.org GSID: ZRvTUsxrBrEJ
CoreVA: A configurable resource-efficient VLIW processor architecture. Jungeblut T, Sievers G. B Hübener, G Sievers, T Jungeblut… - 2014 12th IEEE …, 2014 - ieeexplore.ieee.org GSID: RlBONFBCJaMJ